The present invention relates to a motion vector decoding circuit, and, more particularly, to a motion vector decoding circuit which can be applied to a system such as a high-definition television (HDTV) for decoding motion vectors at high speed.
In a general image signal processing apparatus, a continuous digital image signal, such as that found in a HDTV, a digital VTR, or a multi-media system, is compressed using one of various encoding methods in order to transmit data more efficiently. Differential pulse coded modulation (DPCM) is one of the various encoding methods used to encode digital image signals. This method is based on a correlation of data between adjacent frames of images. In the DPCM method, a difference signal corresponds to a certain amount of data being generated to represent a mass of movement within regions between temporally adjacent frames. In contrast, there is no difference signal if the regions lack movement (i.e., portray the same image).
However, according to a motion compensated DPCM method, the certain amount of data can be reduced by finding the most similar segment in an adjacent frame to an image of a particular segment of a current frame, and encoding the image difference between these two segments. The motion compensated DPCM method encodes difference data between each segment of the current frame and the corresponding image segment of the adjacent frame, to thereby improve the transmission efficiency.
A motion vector used for the motion compensated DPCM method represents a direction and magnitude of movement between the image segments of the adjacent frame and the current frame in which the difference signal corresponding to the image segments of the current frame and the adjacent frame is smallest. The motion vector is encoded prior to being transmitted. An example of encoding the motion vector will be described as follows.
When the motion vectors are 3, 10, 30, 30, -14, -16, 27 and 24, the difference between two adjacent motion vectors, which is referred to as delta, becomes 3 (i.e., 3-0), 7 (i.e., 10-3), 20 (i.e., 30-10), 0, -44, -2, 43 and -3, respectively. When a motion vector is represented as 6 bits and the range of the motion vector is between -32 and 31, 48 bits are needed to represent 8 motion vectors. Thus, concerning difference data -44 and 43 exceeding the motion vector range between -32 and 31, the data -44 smaller than the minimum value -32 of the motion vector range is added to the value 64 of the motion vector range. That is, -44+64=20. The value 64 of the motion vector range is subtracted from the data 43 larger than the maximum value 31 of the motion vector range. That is, 43-64=-21.
A plurality of difference data which have been obtained is divided into a predetermined number of groups, and a residual code is allocated to each difference data in order to discriminate between various difference data belonging to the same group. Here, since the difference data of "0" has the highest probability, the residual code is not assigned thereto. To decode the encoded and transmitted motion vector, a conventional motion vector decoding operation is performed by a software conceptual method in a reduced instruction-set computer (RISC) or a microcontroller.
An image decoding system adapted in a HDTV system, as proposed by the MPEG-2 standard, requires a larger image size and a higher processing speed. Thus, the conventional software conceptual method is unacceptable as it places a great burden on the processor. Thus, a hardware apparatus is needed to reduce the burden imposed on the processor and exclusively perform a motion vector decoding operation.